1. Field of the Invention
The present invention relates to an AC-to-DC conversion apparatus, in particular, to an AC-to-DC conversion apparatus capable of reducing the common-mode interference and applied in the fields of power factor correction (PFC), reactive power compensation and harmonic compensation, and a related control manner thereof.
2. Description of Related Art
Nowadays, the development trend of power factor correction (PFC) has been toward high efficiency, simple structure, easy control and lower electromagnetic interference (EMI). Therefore, as an effective way to increase efficiency, a bridgeless boost PFC circuit gets more and more attentions. A rectifier bridge of the traditional boost PFC circuit is omitted in the bridgeless boost PFC circuit. At any time, the number of conducting diodes in the bridgeless boost PFC is always one diode less in conduction than that of the traditional boost PFC with the rectifier circuit. Consequently, the conduction loss is lowered, and the efficiency is significantly increased accordingly.
A basic structure of a bridgeless boost PFC main circuit is illustrated in FIG. 1, and which is consisting of two fast recovery diodes D1, D2, two switch-transistors S1, S2 each having a body diode, two inductors L1, L2 and a capacitor C. The bridgeless boost PFC is configured to provide a DC output bus voltage (Vbus) to a load R. For a positive half cycle and a negative half cycle of a power-frequency AC input (Vline), the bridgeless boost PFC circuit can be equivalent to a combination of two boost PFC circuits with opposite powers.
One of the two boost PFC circuits with opposite powers is consisting of the inductors L1, L2, the switch-transistor S1, the diode D1 and the body diode of the switch-transistor S2, and operated under as a conduction (operation) mode illustrated in FIG. 2(a). The other one of the two boost PFC circuits with opposite powers is consisting of the inductors L1, L2, the switch-transistor S2, the diode D2 and the body diode of the switch-transistor S1, and operated under as a conduction (operation) mode illustrated in FIG. 2(b). It can be clearly seen from FIGS. 2(a) and 2(b) that only two semiconductor elements are conducted in the bridgeless boost PFC circuit at any time, i.e., the number of conducting elements thereof is one diode less in conduction than the traditional boost PFC circuit with the rectifier bridge. Therefore, the conduction loss is reduced and the efficiency is increased accordingly.
However, the main problem of the circuit as shown in FIG. 1 is high common-mode interference. To be specific, waveforms V0N, VAN, VBN illustrated in FIG. 3 can be obtained by analyzing the electric potentials respectively between the node A and the input neutral line N, between the node B and the input neutral line N, and between the node 0 and the input neutral line N, wherein Vbus is the DC output bus voltage, and Vline is the instantaneous input voltage. It can be clearly seen from FIG. 3 that the electric potentials of the node 0 of the DC output bus, the node A and the node B with respective to the power input side are swing with a frequency of switching the switch-transistors S1, S2. Consequently, the common-mode interference is more serious, and the EMI issue is more outstanding. The problem of common-mode interference and EMI issue needs to be improved.
In addition, referring FIG. 4 with FIG. 1, when the diodes D1 and D2 are cut off, there is no low resistance path is connected with the parasitic capacitor Crss in parallel. Accordingly, the AC-excitation input source will have a current path as the dotted line illustrated in FIG. 4, and thus, a large leakage current will flow through the parasitic capacitor Crss.